? semiconductor components industries, llc, 2013 april, 2013 ? rev. 8 1 publication order number: mc14049b/d mc14049b, mc14050b hex buffer the mc14049b hex inverter/buffer and mc14050b noninverting hex buffer are constructed with mos p ? channel and n ? channel enhancement mode devices in a single monolithic structure. these complementary mos devices find primary use where low power dissipation and/or high noise immunity is desired. these devices provide logic level conversion using only one supply voltage, v dd . the input ? signal high level (v ih ) can exceed the v dd supply voltage for logic level conversions. two ttl/dtl loads can be driven when the devices are used as a cmos ? to ? ttl/dtl converter (v dd = 5.0 v, v ol 0.4 v, i ol 3.2 ma). note that pins 13 and 16 are not connected internally on these devices; consequently connections to these terminals will not affect circuit operation. features ? high source and sink currents ? high ? to ? low level converter ? supply voltage range = 3.0 v to 18 v ? v in can exceed v dd ? meets jedec b specifications ? improved esd protection on all inputs ? nlv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? these devices are pb ? free and are rohs compliant maximum ratings (voltages referenced to v ss ) symbol parameter value unit v dd dc supply voltage range ? 0.5 to +18.0 v v in input voltage range (dc or transient) ? 0.5 to +18.0 v v out output voltage range (dc or transient) ? 0.5 to v dd + 0.5 v i in input current (dc or transient) per pin 10 ma i out output current (dc or transient) per pin 45 ma p d power dissipation, per package (note 1) (plastic) (soic) 825 740 mw t a ambient temperature range ? 55 to +125 c t stg storage temperature range ? 65 to +150 c t l lead temperature (8 ? second soldering) 260 c 1. temperature derating: see figure 3. this device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields referenced to the v ss pin only. extra precautions must be taken to avoid applications of any voltage higher than the maximum rated voltages to this high ? impedance circuit. for proper operation, the ranges v ss v in 18 v and v ss v out v dd are recommended. unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. http://onsemi.com marking diagrams pdip ? 16 p suffix case 648 mc140xxbcp awlyywwg soic ? 16 d suffix case 751b tssop ? 16 dt suffix case 948f 140xxbg awlyww 14 050b alyw xx = specific device code a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb ? free indicator soeiaj ? 16 f suffix case 966 mc140xxb alywg see detailed ordering and shipping information in the package dimensions section on p age 2 of this data sheet. ordering information 16 1 1 16 1 16 1 16 (note: microdot may be in either location)
mc14049b, mc14050b http://onsemi.com 2 pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 out e nc in f out f nc in d out d in e out b in a out a v dd v ss in c out c in b logic diagram mc14049b 14 15 11 9 7 5 3 12 10 6 4 2 nc = pin 13, 16 v ss = pin 8 v dd = pin 1 mc14050b 14 15 11 9 7 5 3 12 10 6 4 2 nc = pin 13, 16 v ss = pin 8 v dd = pin 1 ordering information device package shipping ? mc14049bcpg pdip ? 16 (pb ? free) 500 units / rail mc14049bdg soic ? 16 (pb ? free) 48 units / rail mc14049bdr2g, nlv14049bdr2g* soic ? 16 (pb ? free) 2500 units / tape & reel mc14049bfelg soeiaj ? 16 (pb ? free) 2000 units / tape & reel mc14050bcpg pdip ? 16 (pb ? free) 500 units / rail mc14050bdg, nlv14050bdg* soic ? 16 (pb ? free) 48 units / rail mc14050bdr2g, NLV14050BDR2G* soic ? 16 (pb ? free) 2500 units / tape & reel mc14050bdtg, nlv14050bdtg* tssop ? 16 (pb ? free) 96 units / rail mc14050bdtr2g tssop ? 16 (pb ? free) 2500 units / tape & reel mc14050bfelg soeiaj ? 16 (pb ? free) 2000 units / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *nlv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable.
mc14049b, mc14050b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? (voltages referenced to v ss ) ?????????? ?????????? ?????????? ?????????? characteristic ???? ???? ???? ???? ??? ??? ??? ??? ????? ????? c ????????? ????????? c ????? ????? c ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ??? ??? ??? (note 2) ???? ???? ???? max ??? ??? ??? ??? ??? ??? ?????????? ?????????? ?????????? ?????????? ?????????? output voltage ?0? level v in = v dd ?1? level v in = 0 ???? ???? ???? ??? ??? ??? ??? ??? ??? ? ? ? ??? ??? ??? 0.05 0.05 0.05 ???? ???? ???? ? ? ? ??? ??? ??? 0 0 0 ???? ???? ???? ??? ??? ??? ? ? ? ??? ??? ??? 0.05 0.05 0.05 ??? ??? ??? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ???? ???? ???? 4.95 9.95 14.95 ??? ??? ??? ???? ???? ???? ? ? ? ??? ??? ??? 4.95 9.95 14.95 ??? ??? ??? ? ? ? ??? ??? ??? vdc ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 1.5 3.0 4.0 ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? 2.25 4.50 6.75 ???? ???? ???? ???? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 1.5 3.0 4.0 ??? ??? ??? ??? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ???? ???? ???? ???? 3.5 7.0 11 ??? ??? ??? ??? ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? 3.5 7.0 11 ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? vdc ?????????? ?????????? ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ???? ???? ???? ???? ? 1.25 ? 1.30 ? 3.75 ??? ??? ??? ??? ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? ? 1.0 ? 1.0 ? 3.0 ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? madc ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ???? ???? ???? 3.2 8.0 24 ??? ??? ??? ???? ???? ???? ? ? ? ??? ??? ??? 2.6 6.6 19 ??? ??? ??? ? ? ? ??? ??? ??? madc ?????????? ?????????? ???? ???? ??? ??? ??? ??? ? ??? ??? 0.1 ???? ???? ? ??? ??? 0.00001 ???? ???? 0.1 ??? ??? ? ??? ??? 1.0 ??? ??? adc ?????????? ?????????? ???? ???? ??? ??? ? ??? ??? ??? ??? ???? ???? ??? ??? 10 ???? ???? ??? ??? ? ??? ??? ??? ??? pf ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 1.0 2.0 4.0 ???? ???? ???? ???? ? ? ? ??? ??? ??? ??? 0.002 0.004 0.006 ???? ???? ???? ???? ??? ??? ??? ??? ? ? ? ??? ??? ??? ??? 30 60 120 ??? ??? ??? ??? adc ?????????? ?????????? ?????????? ?????????? ???? ???? ???? ???? ??? ??? ??? ??? ????????????????? ????????????????? ????????????????? ????????????????? a/khz) f + i dd i t = (3.5 a/khz) f + i dd i t = (5.3 a/khz) f + i dd ??? ??? ??? ??? adc 2. data labelled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance. 3. the formulas given are for the typical characteristics only at + 25 c 4. to calculate total supply current at loads other than 50 pf: i t (c l ) = i t (50 pf) + (c l ? 50) vfk where: i t is in a (per package), c l in pf, v = (v dd ? v ss ) in volts, f in khz is input frequency and k = 0.002.
mc14049b, mc14050b http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? (note 5) (c l = 50 pf, t a = + 25 c) ??????????????? ??????????????? ??????????????? characteristic ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ???? (note 6) ???? ???? ???? max ??? ??? ??? ??????????????? ??????????????? ??????????????? output rise time t tlh = (0.7 ns/pf) c l + 65 ns t tlh = (0.25 ns/pf) c l + 37.5 ns t tlh = (0.2 ns/pf) c l + 30 ns ????? ????? ????? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? 100 50 40 ???? ???? ???? ??? ??? ??? ??????????????? ??????????????? ??????????????? ??????????????? ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? 40 20 15 ???? ???? ???? ???? ??? ??? ??? ??? ??????????????? ??????????????? ??????????????? ??????????????? ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? 80 40 30 ???? ???? ???? ???? ??? ??? ??? ??? ??????????????? ??????????????? ??????????????? ??????????????? ????? ????? ????? ????? ???? ???? ???? ???? ???? ???? ???? ???? ? ? ? ???? ???? ???? ???? 40 20 15 ???? ???? ???? ???? ??? ??? ??? ??? c. 6. data labeled ?typ? is not to be used for design purposes but is intended as an indication of the ic?s potential performance. figure 1. typical output source characteristics figure 2. typical output sink characteristics mc14049b mc14050b mc14049b mc14050b v dd v ss v dd v ss 1 8 1 8 i ol i oh v oh v ol v ds = v oh - v dd v dd v ss 1 8 i ol v ol v dd v ss 1 8 i oh v oh v dd = v ol i oh , output source currnt (madc) i ol , output sink current (madc) -50 -40 -30 -20 -10 0 -10 -8.0 -6.0 -4.0 -2.0 0 v ds , drain-to-source voltage (vdc) v gs = 5.0 vdc v gs = 10 vdc maximum current level v gs = 15 vdc 160 120 80 40 0 0 2.0 4.0 6.0 8.0 10 v ds , drain-to-source voltage (vdc) v gs = 15 vdc v gs = 10 vdc maximum current level v gs = 5.0 vdc
mc14049b, mc14050b http://onsemi.com 5 figure 3. ambient temperature power derating p d , maximum power dissipation (mw) per package 1200 1100 1000 900 825 800 740 700 600 500 400 300 200 100 0 175 150 125 100 75 50 25 t a , ambient temperature ( c) 175 mw (p) 120 mw (d) (p) pdip (d) soic t phl figure 4. switching time test circuit and waveforms pulse generator v dd v ss 8 1 c l v out v in # # invert on mc14049b only 20 ns 20 ns v dd v ss v oh v ol v oh v ol 90% 50% 10% 90% 50% 10% 90% 50% 10% t plh t tlh t phl t thl t phl t plh t tlh t thl output mc14049b output mc14050b input
mc14049b, mc14050b http://onsemi.com 6 package dimensions pdip ? 16 p suffix case 648 ? 08 issue t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ? a ? b f c s h g d j l m 16 pl seating 18 9 16 k plane ? t ? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01
mc14049b, mc14050b http://onsemi.com 7 package dimensions soic ? 16 d suffix case 751b ? 05 issue k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p ? b ? ? a ? m 0.25 (0.010) b s ? t ? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 6.40 16x 0.58 16x 1.12 1.27 dimensions: millimeters 1 pitch 16 89 8x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc14049b, mc14050b http://onsemi.com 8 package dimensions tssop ? 16 dt suffix case 948f issue b 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch ??? ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . section n ? n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 16x ref k n n *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc14049b, mc14050b http://onsemi.com 9 package dimensions soeiaj ? 16 f suffix case 966 issue a h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 mc14049b/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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